• Demo Image
  • Demo Image
  • Demo Image

Available on request (products@gaussteam.com):

  • User’s guide
  • CAD model in STEP

ABACUS is an OBC (On-Board Computer) subsystem with a general-purpose hardware platform, suited for a wide range of satellite and CubeSat missions. It is designed to be flexible and scalable in terms of processing power, with the goal of maintaining a very low power consumption.

The presence of a MSP430 (EP series) microcontroller and a Spartan-3E FPGA, organized in two independent but cooperative cores, provides the system with hardware redundancy and common mode fault tolerance.
The two cores offer many modalities to be implemented (e.g. Master/Slave or multi-Master) and the FPGA offers all the advantages of the RTL coding, for implementing specific tasks (e.g. attitude control) or generic systems also with IP cores of third parts.

With the FPGA, high reliability may be achieved using TMR (triple modular redundancy) configuration codes. Several embedded sensors provide health monitoring and attitude control data. The system design offers the possibility to reconfigure the FPGA code and the MCU firmware in flight.

ABACUS is compatible with FreeRTOS Real-time Operating System, as the MCU used in ABACUS has been already successfully employed in FreeRTOS ports.

Primary Features

  • Two cores (MCU MSP430 and FPGA Spartan-3E) directly interconnected with a 24 line bus;
  • MSP430 EP series is a 16 bit RISC MCU running up to 25MHz. It is an HiRel Enhanced Product of Texas Instruments that supports Defense and Aerospace applications;
  • FreeRTOS Real-Time OS compatible;
  • 10 x 3,3V Analog Input and up to 45 x Digital GPIO channels;
  • 16 x Voltage level shiftable GPIOs with interrupt features;
  • 4 x COM ports (one of them also in RS422/485 standard levels Full or Half Duplex);
  • 2 x I2C and 1 x SPI bus interfaces;
  • Xilinx Spartan-3E FPGA RAM-based core with 500K gates for intensive operations like ADCS, Image processing, or Turbo codes;
  • 34 x GPIO (usable as LVDS) and 8 x GPI channels from FPGA;
  • FPGA running at 25MHz or 100MHz (default);
  • Embedded 16Mb (2MB) SRAM memory dedicated to the FPGA;
  • FPGA and MCU reprogrammable from ground;
  • Embedded IMU with 3 axis magnetometer, accelerometer and gyroscope;
  • Embedded sensors: 3 x temperature sensors, 1 x drawn current monitor;
  • Embedded RTC;
  • Embedded 2 x 16MB flash NOR memories.

Other Features

  • Both cores share the external sensors;
  • Weight only about 59 grams;
  • PC/104 CubeSat form factor compatible;
  • Several modalities for low power consumption (about 50mW with the FPGA OFF, the MCU ON and recording data from sensors on board);
  • Powered from the 5V satellite bus;
  • Off the shelf industrial grade / automotive components;
  • Operating temperature range -40°C to +85°C.

Flight Heritage

ABACUS OBC flew on:

  • UniCubeSat-GG (2012 , CubeSat 1U);
  • UniSat-5 (2013, microsatellite of 32kg);
  • UniSat-6 (2014, microsatellite of 26kg);
  • TigriSat (2014, CubeSat 3U);
  • Serpens (2015, CubeSat 3U)
  • UNISAT-7 (2021, 31kg Micro-sat).

In April 2021 it reached more than six years of continuous flight heritage on UniSat-6, Tigrisat, and UNISAT-7.


  • User friendly software libraries are included: used on UniSat-6, TigriSat and Serpens satellites for the IMU, temperature sensors, RTC, flash memory, I2C, COM, SPI bus control and GPIO;
  • Libraries are available for using ABACUS with GAUSS Radio and EPS, AstroDev radios and GomSpace EPS;
  • A test example code for using the libraries is included.
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